Current state-of-the-art microprocessors such as the 386.TM. family of processors manufactured by Intel Corporation, the corporate assignee of this application, have two fundamental modes of operation: a real mode and a protected mode. The real mode is compatible with earlier processors whose addressing is limited to the real address space. Protected mode, on the other hand, supports virtual addressing.
In such prior art microprocessors, system interrupts are serviced by routines that are typically included in the basic input/output system (BIOS). This approach is generally satisfactory if the processor is operating in the real mode. However, if the processor is in the protected mode of operation, routines resident in BIOS are no longer accessible from an application program. A system interrupt therefore requires an application running in the protected mode to relinquish the system assets and restore real mode operation in BIOS. The state of the machine when the interrupt occurred is lost and the protected mode application program must be reinitialized after the system interrupt is serviced. System interrupts are thus non-transparent to applications running in the protected mode of operation.
Because of the constraints of protected mode operation, an original equipment manufacturer (OEM) of microprocessor systems such as personal computers cannot provide a transparent system interrupt since the OEM controls, at most, the system BIOS. Unlike all known prior art interrupt techniques for microprocessors, the system interrupt implemented by the present invention is entirely transparent to the operating system and other system-level resources of the microprocessor.